Buffer Issue Resolution Documents (BIRD)

To submit a BIRD to the IBIS Open Forum, please use the BIRD Template, Rev. 1.3.

ID#TitleRequesterDate SubmittedDate RevisedDate AcceptedSupporting Version
232Clarification of Ts4file and Non-AMI Feature Relationships
Michael Mirmak, Intel CorporationNovember 19, 2024February 21, 2025
231Clarifications on AMI Block Concepts
Michael Mirmak, Intel CorporationMarch 26, 2024May 31, 2024
230.1Adding a Definitions Section to IBIS
Michael Mirmak, Intel CorporationMarch 19, 2024; April 30, 2024May 31, 2024
229.1AMI Test Data Support
Michael Mirmak, Intel Corp.December 19, 2023, February 13, 2024
228Pin Name Field Extension
Michael Mirmak, Intel CorporationDecember 5, 2023January 26, 2024
227AMI Ignore Block Feature
Alaeddin A. Aydiner, Sai Zhou, Intel Corp.November 14, 2023January 5, 2024
226PSIJ Sensitivity
Kinger Cai, Fern Nee Tan, Chi-te Chen, Michael Mirmak, Intel Corp.August 8, 2023December 8, 2023
225Clarification for bus_label rules
Arpad Muranyi, Weston Beal, Randy Wolff, Siemens EDAJuly 11, 2023September 15, 2023
224New AMI Reserved Parameters for Ts4file port order
Liwei Zhao, Intel Corp.; Michael Mirmak, Intel Corp.April 25, 2023June 23, 2023
223.1Add support for SPIM in IBIS
Kinger Cai, Chi-te Chen, Intel Corp.March 7, 2023, September 12, 2023July 14, 2023 (223); November 17, 2023 (223.1)
222Clock Times Clarifications
Arpad Muranyi, Siemens EDANovember 8, 2022December 9, 20227.2
221AMI_parameters_in Clarification
Michael Mirmak, Intel Corp.October 26, 2022December 9, 20227.2
220.2Pre-driver PSIJ Sensitivity Keyword
Yifan Ding, Chulsoon Hwang, Missouri S&T; Zhiping Yang, PCB Automation Inc., Missouri S&T; Arpad Muranyi, Randy Wolff, Siemens EDAOctober 20, 2022, November 1, 2024, January 6, 2025April 4, 2025
219.1 AMI Parameter Root Name Clarifications
Michael Mirmak, Intel Corp.March 29, 2022 May 3, 2022August 12, 2022 7.2
218Designator Pin List Relaxation
Arpad Muranyi, Siemens EDAMarch 2, 2022April 22, 20227.2
217Require Clocked Rx Models to Return Clock Times
Arpad Muranyi, Siemens EDAJanuary 18, 2022March 11, 20227.2
216Alphanumeric Pin Names
Arpad Muranyi, Siemens EDAJanuary 18, 2022March 11, 20227.2
215Back-channel Statistical Optimization Editorial Update
Randy Wolff, Micron Technology; Bob Ross, Teraspeed LabsSeptember 22, 2021October 29, 20217.1
214Change “bit_time” to “symbol_time”
Arpad Muranyi, Siemens EDASeptember 15, 2021October 8, 20217.1
213.1Extending IBIS-AMI for PAMn Analysis
Walter Katz, The MathWorks, IncMay 5, 2021May 31, 2022July 22, 20227.2
212Clarification of PAM4_UpperThreshold, PAM4_CenterThreshold,
Hansel Desmond Dsilva, Achronix SemiconductorApril 13, 2021May 14, 20217.1
211.4IBIS AMI Reference Flow Improvements
March 23, 2021April 21, 2021; June 11, 2021; August 24, 2021; February 8, 2022April 1, 20227.2
210New Redriver AMI Flow
Fangyi Rao, Keysight TechnologiesFebruary 19, 2021Rejected April 22, 2022NA
209Make Clock Times Output Required for Clock Executable Models
Arpad Muranyi, Siemens Digital Industries SoftwareJanuary 28, 2021March 12, 20217.1
208Clock-Data Pin Relationship Keyword
Michael Mirmak, Intel Corp. October 6, 2020January 8, 20217.1
207New AMI Reserved Parameters Component_Name and Signal_Name
Randy Wolff, Micron TechnologyJuly 29, 2020October 9, 20207.1
206Clarification of text “transition time”
Hansel Desmond Dsilva, Achronix Semiconductor;June 26, 2020September 18, 20207.1
205New AMI Reserved Parameter for Sampling Position in AMI_Init Flow
Hansel Desmond Dsilva, Achronix Semiconductor;May 14, 2020June 26, 20207.1
204DQ_DQS GetWave Flow for Clock Forwarding Modeling
Walter Katz, The MathWorks April 22, 2020June 26, 2020 (Superseded by BIRD209)7.1
203Submodel Clarification
Randy Wolff, Micron TechnologyMarch 10, 2020April 24, 20207.1
202.3Electrical Descriptions of Modules
Walter Katz, Signal Integrity Software; Justin Butterfield, Micron Technology; Curtis Clark, ANSYS; Arpad Muranyi, Siemens Digital Industries Software; Michael Mirmak, Intel Corp.; Bob Ross, Teraspeed Labs; Lance Wang, Zuken USA; Randy Wolff, Micron Technology January 22, 2020October 29, 2020; January 27, 2021; February 19, 2021March 12, 20217.1
201.1Back-channel Statistical Optimization
Walter Katz, Signal Integrity SoftwareJanuary 7, 2020June 2, 2020July 17, 2020 (Superseded by BIRD215)7.1
200C_comp Model Using IBIS-ISS or Touchstone
Randy Wolff, Micron Technology, Inc.July 9, 2019September 27, 20197.1
199Fix Rx_Receiver_Sensitivity Inconsistencies
Arpad Muranyi, Mentor a Siemens BusinessMarch 19, 2019June 7, 20197.1
198.3Keyword Additions for On-Die PDN (Power Distribution Network) Modeling
Kazuki Murata; Sony LSI Design Inc.;March 11, 2019April 3, 2020, June 23, 2020, August 7, 2020August 7, 20207.1
197.7New AMI Reserved Parameter DC_Offset
Walter Katz, SiSoft,November 27, 2018December 4, 2018, January 15, 2019, June 25, 2019, July 23, 2019, October 15, 2019, December 3, 2019, January 7, 2020February 21, 20207.1
196.1Prohibit Periods at the End of File Names
Arpad Muranyi, Mentor Graphics, A Siemens BusinessSeptember 25, 2018October 12, 2018October 12, 20187.0
195.1Enabling [Rgnd] and [Rpower] Keywords for Input Models
Michael Mirmak, Intel Corp.June 19, 2018June 29, 2018August 31, 20187.1
194Revised AMI Ts4file Analog Buffer Models
Walter Katz, Signal Integrity Software, Inc.May 2, 2018June 29, 20187.0
193Figure 29 corrections
Arpad Muranyi, Mentor Graphics, A Siemens BusinessJanuary 10, 2018March 23, 20187.0
192.1Clarification of List Default Rules
Michael Mirmak, Intel Corp.August 22, 2017August 23, 2017 September 15, 20177.0
191.2Clarifying Locations for Si_location and Timing_location
Bob Ross, Teraspeed LabsJune 28, 2017 August 04, 2017; August 08, 2017September 15, 20177.0
190Clarification for Redriver Flow
Ambrish Varma, Cadence Design Systems, Inc.June 14, 2017Rejected April 22, 2022NA
189.7Interconnect Modeling Using IBIS-ISS and Touchstone
Walter Katz, Signal Integrity Software (SiSoft); Radek Biernacki, Keysight Technologies; Justin Butterfield, Micron Technology; Curtis Clark, ANSYS; Mike LaBonte, Signal Integrity Software (SiSoft); Arpad Muranyi, Mentor Graphics; Michael Mirmak, Intel Corp.; Bob Ross, Teraspeed Labs; Randy Wolff, Micron TechnologyJanuary 27, 2017March 29, 2017; April 19, 2017; April 26, 2017; June 22, 2017;June 29, 20187.0
188.1Expanded Rx Noise Support for AMI
Michael Mirmak, Intel CorporationDecember 13, 2016January 17, 2017February 17, 20177.0
187.3Format and Usage Out Clarifications
Michael Mirmak, Intel CorporationDecember 13, 2016 December 16, 2016; January 10, 2017; March 14, 2017April 21, 20177.0
186.4File Naming Rules
Walter Katz, Mike LaBonte, Signal Integrity Software, Inc.; Bob Ross, Teraspeed LabsNovember 29, 2016February 16, 2017; April 14, 2017; June 22, 2017, July 14, 2017July 14, 20177.0
185.2Section 3 Reserved Word Guideline Update
Bob Ross, Teraspeed LabsSeptember 13, 2016October 14, 2016; December 6, 2016January 6, 20177.0
184.2Model_name and Signal_name Restriction for POWER and GND Pins
Bob Ross, Teraspeed LabsSeptember 1, 2016September 16, 2016; December 6, 2016January 6, 20177.0
183[Model Data] Matrix Subparameter Terminology Correction
Bob Ross, Teraspeed LabsAugust 30, 2016October 14, 20167.0
182POWER and GND [Pin] signal_name as [Pin Mapping] bus_label
Walter Katz, Signal Integrity SoftwareAugust 30, 2016October 14, 20167.0
181.1I-V Table Clarifications
Mike LaBonte, Signal Integrity Software; Bob Ross, Teraspeed LabsAugust 26, 2016October 13, 2016Rejected May 13, 2022NA
180Require Unique Pin Names in [Pin]
Mike LaBonte, Signal Integrity SoftwareFebruary 17, 2016October 14, 20167.0
179New IBIS-AMI Reserved Parameter Special_Param_Names
Arpad Muranyi, Mentor GraphicsOctober 13, 2015December 18, 20157.0
178.3Specifying Buffer Directionality for AMI
Michael Mirmak, Intel Corp.June 2(am), 2015June 2(pm), 2015; June 16, 2015; July 31, 2015July 31, 20156.1
177[Initial Delay] keyword for Submodels and Driver Schedules
Radek Biernacki and Ming Yan, Keysight Technologies, Inc.;May 21, 2015June 12, 20156.1
176Power Pin Package Modeling
Randy Wolff, Micron Technology, Inc.; Radek Biernacki, Keysight Technologies; Bob Ross, Teraspeed LabsMay 8, 2015June 12, 20156.1
175.3Extending IBIS-AMI for PAM4 Analysis
Walter Katz, Mike Steinberger, Todd Westerhoff (SiSoft)April 30, 2015May 22, 2015, June 3, 2015, June 12, 2015June 12, 20156.1
174.1Quote Character Clarifications
Arpad Muranyi, Mentor GraphicsNovember 11, 2014January 28, 2015February 27, 20156.1
173.3Package RLC Matrix Diagonals
Randy Wolff, Micron Technology, Inc.;July 16, 2014August 19, 2014; September 4, 2014; September 17, 2014October 3, 20146.1
172.2Extend Multilingual Parameter and Converter_Parameter Rules
Bob Ross, Teraspeed Consulting GroupJuly 11, 2014August 6, 2014, August 22, 2014August 22, 20146.1
171.3Clarify that Empty Root Name is Not Permitted in AMI Files
Bob Ross, Teraspeed Consulting GroupJune 25, 2014July 11, 2014, August 6, 2014, August 22, 2014August 22, 20146.1
170Delete Extra Paragraph for Ports under [External Circuit]
Bob Ross, Teraspeed Consulting GroupJune 25, 2014August 1, 20146.1
169.1DLL Dependency Checking
Arpad Muranyi, Mentor Graphics; Mike LaBonte, SiSoftJune 24, 2014August 22, 2014October 3, 20146.1
168.1Handling of Overclocking Caused by Delay in Waveform Tables
Radek Biernacki and Ming Yan, Agilent Technologies, Inc.;April 22, 2014June 20, 2014June 20, 20146.1
167.1Table Corrections for Tx Jitter Parameters and Ignore_Bits
Michael Mirmak, Intel Corp.April 22, 2014April 23, 2014 May 23, 20146.1
166.4Resolving problems with Redriver Init Flow
Walter Katz, Signal Integrity Software, Inc.April 2, 2014; April 18, 2017; April 26, 2017; July 19, 2017; August 4, 2017Rejected April 22, 2022NA
165.1Parameter Passing Improvements for [External Circuit]s
Arpad Muranyi & John Angulo, Mentor Graphics; Ambrish Varma & Brad Brim, Cadence Design Systems, IncJanuary 9, 2014November 20, 2017December 15, 20177.0
164Allowing Package Models to be defined in [External Circuit]
Ambrish Varma & Brad Brim, Cadence Design Systems, Inc.; Arpad Muranyi, Mentor GraphicsJanuary 9, 2014Rejected July 20, 2018NA
163Instantiating and Connecting [External Circuit] Package Models with [Circuit Call]
Arpad Muranyi & John Angulo, Mentor Graphics; Ambrish Varma & Brad Brim, Cadence Design Systems, Inc.January 9, 2014Rejected July 20, 2018NA
162.1Change to Usage “Info, Out” for AMI Jitter and Noise Parameters
Bob Ross, Teraspeed Consulting Group; Walter Katz, SiSoft; Fangyi Rao, Agilent TechnologiesJuly 9, 2013July 16, 2013August 9, 20136.0
161.1Supporting Incomplete and Buffer-only [Component] Descriptions
Michael Mirmak, Intel Corp.May 8, 2013May 10, 2013Rejected October 27, 2017NA
160.1Analog Buffer Modeling Improvements
Arpad Muranyi, Mentor GraphicsMarch 19, 2013April 23, 2013May 17, 20136.0
159Rx_Receiver_Sensitivity Clarification
Arpad Muranyi, Mentor GraphicsMarch 14, 2013Rejected April 26, 2013NA
158.7AMI Ts4file Analog Buffer Models
Walter Katz, Signal Integrity Software, Inc.February 20, 2013; May 15, 2013; May 17, 2013; May 24, 2013;October 27, 2017 (Superseded by BIRD194)7.0
157Parameterize [Driver Schedule]
Arpad Muranyi, Mentor Graphics; Romi Mayder, XilinxJanuary 24, 2013Rejected August 21, 2015NA
156.3IBIS-AMI Extension for Mid-channel Redrivers and Retimers
Mahbubul Bari, Ron Olisar, and Hassan Rafat, Maxim Integrated;January 11, 2013January 12, 2013; May 24, 2013, June 7, 2013June 7, 20136.0
155.2New AMI API to Resolve Dependent Model Parameter
Fangyi Rao and Radek Biernacki, Agilent Technologies, Inc.December 13, 2012September 10, 2013, September 17, 2013Oct. 11, 20136.1
154.1Using IBIS-AMI Leaf List_Tip in List Parameters
Walter Katz, Signal Integrity Software, Inc.November 16, 2012May 24, 2013June 7, 20136.0
153.1Parameter Tree Keyword
Arpad Muranyi, Mentor GraphicsJune 19, 2012March 14, 2013Rejected June 7, 2013NA
152Analog Model Boundary Definition
Arpad Muranyi, Mentor GraphicsMay 1, 2012June 1, 20126.0
151IBIS-AMI Modified Reserved Parameters for Jitter/Noise
Walter Katz, SiSoft; Bob Ross, Teraspeed Consulting GroupFebruary 17, 2012March 9, 20125.1
150IBIS-AMI New Reserved Parameters for Dependency Tables
Walter Katz, Todd Westerhoff, SiSoft; Adge Hawes, IBMJan. 20, 2012Rejected Oct. 11, 2013NA
149.1Usage Out Syntax Correction
Arpad Muranyi, Mentor Graphics, Inc.January 10, 2012February 6, 2012February 17, 20125.1
148Allowable Model_types with IBIS-AMI
Arpad Muranyi, Mentor Graphics, Inc.November 30, 2011January 6, 20125.1
147.6Back-channel Support
Bob Miller, Broadcom, LtdOctober 18, 2011September 1, 2016, October 11, 2016, October 13, 2016, March 10, 20177.0
146Clarify sample_interval for IBIS-AMI
Arpad Muranyi, Mentor GraphicsOctober 18, 2011December 9, 20115.1
145.3Cascading IBIS I/O buffers with [External Circuit]s using the [Model Call] keyword
Taranjit Kukal, Ambrish Varma, Cadence Design Systems, Inc. Arpad Muranyi, Mentor Graphics.September 19, 2011November 10, 2011; May 21, 2013Rejected July 20, 2018
144.3Add Touchstone to [External Model] and [External Circuit] as a Supported Language
Taranjit Kukal, Feras Al-Hawari, Ambrish Varma, Terry Jernberg, Cadence Design Systems, Inc.;September 19, 2011November 10, 2011; February 10, 2012; March 5, 2011Rejected April 26, 2013NA
143.1Correcting the rules for AMI_Close
Arpad Muranyi, Mentor GraphicsJune 29, 2011September 6, 2011October 7, 20115.1
142Clarification of [Test Data] and [Test Load] scoping
Mike LaBonte, Cisco SystemsJuly 5, 2011September 16, 20115.1
141[Composite Current] Clarifications
Randy Wolff, Micron Technology and Lance Wang, IO MethodologyJuly 1, 2011September 16, 20115.1
140.2Format Corner and Range Clarification for IBIS-AMI
Arpad Muranyi, Mentor GraphicsJune 28, 2011November 30, 2011 December 15, 2011January 6, 20125.1
139.2Reserved_Parameters Order
Bob Ross, Teraspeed Consulting GroupJune 21, 2011 July 12, 2011, September 16, 2011September 16, 20115.1
138IBIS-AMI Section 6c Tables Update
Bob Ross, Teraspeed Consulting GroupJune 21, 2011 September 16, 20115.1
137.2AMI_parameters_in, AMI_parameters_out, msg Clarifications
Arpad Muranyi, Mentor Graphics; Curtis Clark, AnsysJune 21, 2011August 2, 2011, September 6, 2011September 16, 20115.1
136Defining Relationships between Type and Format
Ambrish Varma, Cadence Design Systems, Inc. June 21,2011September 16, 20115.1
135.1Add Boolean to BNF for IBIS-AMI
Arpad Muranyi, Mentor GraphicsMay 31, 2011August 2, 2011September 16, 20115.1
134AMI Function Return Value Clarification
Arpad Muranyi, Mentor GraphicsMay 20, 2011June 24, 20115.1
133.1Model Corner C_comp
Bob Ross, Teraspeed Consulting GroupMay 25, 2011 January 6, 2012January 6, 20125.1
132Clarification of the Table Format for IBIS_AMI
Bob Ross, Teraspeed Consulting Group May 25, 2011August 5, 20115.1
131IBIS-AMI Repeaters
Walter Katz, Signal Integrity Software, Inc.April 21, 2011Rejected June 7, 2013NA
130Crosstalk Clarification With Respect to AMI
Ken Willis, Sigrity, Inc.April 12, 2011June 24, 20115.1
129.1Add "polarity" Argument to D_to_A Converters
Arpad Muranyi, Mentor GraphicsMarch 24, 2011March 14, 2013Rejected April 26, 2013NA
128.2Allow AMI_parameters_out to pass AMI_parameters_in data on calls to AMI_GetWave
Walter Katz, SiSoft; Ambrish Varma, Cadence Design Systems, Inc.March 11, 2011August 7, 2014; August 22, 2014Rejected October 14, 2016NA
127.4IBIS-AMI Typographical Corrections
Arpad Muranyi, Mentor Graphics, Inc.January 18, 2011May 17, 2011; August 16, 2011; October 18, 2011; November 3, 2011December 9, 2011 5.1
126IBIS-AMI New Reserved Parameter AMI_Version
Walter Katz, SiSoft; Arpad Muranyi, Mentor Graphics, Inc.December 14, 2010February 18, 20115.1
125.1Make IBIS-ISS Available for IBIS Package Modeling
Arpad Muranyi, Mentor GraphicsOctober 21, 2010July 5, 2011Rejected July 20, 2018NA
124 IBIS-AMI New Reserved Parameters for Dependency Tables
Walter Katz, Mike Steinberger, Todd Westerhoff, SiSoftOctober 20, 2010Rejected May 11, 2012NA
123.5IBIS-AMI New Reserved Parameters for Jitter/Noise
Walter Katz, Mike Steinberger, Todd Westerhoff, SiSoftOctober 20, 2010April 1, 2011; January 3, 2012, June 11, 2012; October 23, 2012, December 28, 2012January 11, 20136.0
122IBIS-AMI New Reserved Parameters for Analog Modeling
Walter Katz, Mike Steinberger, Todd Westerhoff, SiSoftOctober 20, 2010Rejected April 26, 2013NA
121.2IBIS-AMI New Reserved Parameters for Data Management
Walter Katz, Mike Steinberger, Todd Westerhoff, SiSoftOctober 20, 2010June 1, 2011; November 20, 2012January 11, 20136.0
120.1IBIS-AMI Flow Correction
Walter Katz, Signal Integrity Software, Inc.;October 5, 2010March 15, 2011April 22, 20115.1
119IBIS-AMI New Reserved Parameters
Walter Katz, Mike Steinberger, Todd Westerhoff, SiSoftOctober 5, 2010Rejected Jan. 28, 2011NA
118.4Analog Parameter Assignments
Arpad Muranyi, Mentor Graphics;October 5, 2010November 8, 2010; March 23, 2011; June 19, 2012; March 14, 2013Rejected April 26, 2013NA
117.5Parameterize A_to_D and D_to_A Converters
Arpad Muranyi, Mentor Graphics;September 29, 2010October 5, 2010; November 8, 2010; March 23, 2011; June 19, 2012; March 14, 2013Rejected April 26, 2013NA
116.2Add IBIS-ISS to [External Model] and [External Circuit] as a Supported Language
Arpad Muranyi, Mentor GraphicsSeptember 29, 2010June 19, 2012; March 14, 2013Rejected April 26, 2013NA
115 Clarifying Min/Typ/Max in IBIS-AMI
Arpad Muranyi, Mentor Graphics, Inc.September 23, 2010October 22, 20105.1
114.3IBIS-AMI Definition Clarifications
Arpad Muranyi, Mentor Graphics, Inc.August 24, 2010September 8, 2010, October 20, 2010, November 8, 2010December 10, 20105.1
113.3Weak tie-up or tie-down resistance and voltage
Greg Edlund, IBMAugust 19, 2010September 10, 2010, October 20, 2010, October 22, 2010November 19, 20105.1
112 IBIS-AMI clock_times Clarification
Scott McMorrow, Teraspeed Consulting GroupMay 4, 2010June 11, 20105.1
111.3Extended Usage of External Series Components in EBDs
Michael Schaeder, ZukenJuly 1, 2008September 18, 2008, February 10, 2009, April 3, 2009April 24, 20095.1
110Algorithmic Modeling Interface Section Title
Bob Ross, Teraspeed Consulting GroupJune 24. 2008July 11, 20085.0
109.1S_overshoot_high/S_overshoot_low Clarification
Anders Ekholm, EricssonMay 14, 2008June 6, 2008June 6, 20085.0
108.1Fixing Algorithmic Modeling API Impulse_matrix Nomenclature
Bob Ross, Teraspeed Consulting GroupApril 29, 2008June 6, 2008June 6, 20085.0
107.2Update to Algorithmic Modeling API (AMI) Support in IBIS
Todd Westerhoff, SiSoft and Zhen Mu, Cadence Design SystemsApril 3, 2008April 24, 2008, April 29, 2008May 16, 20085.0
106Clarification on Signal_pin Parameters
Arpad Muranyi, Mentor Graphics Corp.February 26, 2007May 16, 20085.0
105Mandatory Golden Waveform Data
Anders Ekholm, EricssonFebruary 22, 2008Rejected June 6, 2008NA
104.1Algorithmic Modeling API (AMI) Support in IBIS
(in alphabetical order by company) C. Kumar, Hemant Shah, Ambrish Varma, Cadence; Ian Dodd, Consultant; Adge Hawes, IBM;October 10, 2007November 12, 2007November 30, 20075.0
103.1[Model Spec] DDR2 Overshoot/Undershoot Parameters
Randy Wolff, Micron Technology, Inc.April 14, 2006; May 10, 2006June 2, 20065.0
102File Name Limit Extension
Michael Mirmak, Intel Corp.January 8, 2006February 17, 20064.2
101Section 6b, Figure 12 Example Note
Bob Ross, Teraspeed Consulting GroupDecember 1, 2005January 6, 20064.2
100.2Allow Pure Analog *-AMS Models
Ian Dodd, Mentor Graphics; Arpad Muranyi, Intel CorporationNovember 10, 2005December 2, 2005, January 13, 2006January 27, 20064.2
99.1AMS Language Versions
Arpad Muranyi, Intel Corp.June 10, 2005July 15, 2005August 5, 20054.2
98.3Gate Modulation Effect (table format)
Arpad Muranyi, Mentor Graphics Corp.; Antonio Girardi,May 20,2005, March 9, 2007, July 31, 2007October 10, 2007November 2, 20075.0
97.2Gate Modulation Effect
Arpad Muranyi, Intel Corp.March 4, 2005April 22, 2005, May 25, 2005Rejected November 30, 2007NA
96[Model Spec] and [Receiver Thresholds] Ordering
Randy Wolff, Micron Technology, Inc.December 29, 2004February 18, 2005 4.2
95.6Power Integrity Analysis using IBIS
Syed Huq, Vinu Arumugham and Zhiping Yang, Cisco Systems;December 13, 2004 Jan. 28, 2005, March 8, 2005, March 29, 2005, April 19, 2005October 7, 20055.0
94.2Clarifications on [Diff Pin] Parameters
Arpad Muranyi, Intel Corp.February 22, 2005March 4, 2005; July 15, 2005September 16, 20054.2
93.1Model and Signal Name Limit Extension
Michael Mirmak, Intel Corp.November 5, 2004November 21, 2004December 10, 20044.2
92.1Multiple Terminator and Series Elements under [Model]
Michael Mirmak, Intel Corp.November 2, 2004November 21, 2004January 28, 20054.2
91.3Multi-lingual Logic States Clarification
Ian Dodd and John Angulo, Mentor Graphics Corp. August 26, 2004October 4, 2004; October 26, 2004November 19, 2004 4.2
90.2Multiple A_to_D Subparameters Clarification
Bob Ross, Teraspeed Consulting GroupAugust 17, 2004September 1, 2004, September 22, 2004October 29, 2004 4.2
89.1Keyword Hierarchy Tree
Michael Mirmak, Intel CorporationApril 5, 2004May 11, 2004 June 4, 20044.2
88.3Driver Schedule Initialization
Bob Ross, Teraspeed Consulting Group; Arpad Muranyi, IntelMarch 9, 2004June 11, 2004, June 18, 2004, June 21, 2004 July 16, 2004 4.2
87Series Pin Mapping Clarifications
Arpad Muranyi, Intel CorporationJanuary 19, 2004February 20, 20044.2
86.1Clarification of Submodel Mode
Lynne Green, Green Streak Programs, Bob Ross, TeraspeedNovember 21, 2003December 26, 2003January 9, 20044.1
85.3Slew Time Estimate Clarifications
John Angulo, Mentor Graphics Corp.October 3, 2003November 7, 2003; December 3, 2003; December 8, 2003 January 9, 2004 4.1
84.1Driver Schedule Clarifications
Arpad Muranyi, Intel CorporationSeptember 30, 2003November 21, 2003 December 5, 20034.1
83.2Series Element Clarifications
Michael Mirmak, Intel CorporationSeptember 17, 2003November 7, 2003; November 19, 2003 December 5, 20034.1
82.2Clarification of Clamp Table Use
Lynne Green, Cadence, and Robert Haller, SiSoftJune 27, 2003, August 7, 2003, August 22, 2003August 22, 20034.1
81.1Clarify Usage Rule for [Pin] I/O Model Assignment
Lance Wang, Cadence Design Systems, Inc.December 23, 2002; January 10, 2003February 14, 20034.1
80.1Add External Reference Column to Pin Mapping Keyword
Michael Mirmak, Intel CorporationNovember 25, 2002, January 6, 2003February 14, 2003 4.1
79Non-linear Buffer Impedance (extension to C_comp)
Luca Giacotto (Alstom Transport) & Arpad Muranyi (Intel Corp.)November 6, 2002Rejected March 28, 2003NA
78.1Comment Line Length Limit
Lynne Green, Cadence Design SystemsSeptember 6, 2002; December 10, 2002January 10, 20034.1
77.2Differential Subparameter Additions
Bob Ross, Mentor GraphicsJuly 15, 2002, July 26, 2002, December 20, 2002January 10, 20034.1
76.1Additional Information Related to C_comp Refinements
Arpad Muranyi and Stephen Peters, Intel Corp.June 28, 2002, July 19,2002July 19, 20024.0
75.8Multi-Lingual Model Support
Bob Ross and Chris Reid, Mentor Graphics, Arpad Muranyi3/29/02, 5/3/02, 7/15/02, 8/14/02, 9/11/02, 9/27/02,1/10/034.1
74.6EMI Parameters
Guy de Burgh, Mentor Graphics3/19/02, 5/31/02, /9/16/02, 4/30/03, 5/21/03, 7/18/03,08/08/035.0
73.4Fall Back Submodel
Bob Ross, Mentor Graphics8-2-01, 10-1-01, 10-16-01, 11-12-01, 11-19-01January 11, 20024.0
72.3Accommodating PMOS and NMOS//PMOS Series FET Models
Tom Dagostino, Mentor Graphics7-26-01, 10-3-01, 10-8-01, 10-26-0110-26-014.0
71Timing Test Loads in [Model Spec] to Support PCI & PCI-X
Stephen Peters, Intel Corp.April 30, 2001August 10, 20014.0
70.5Golden Waveforms
Greg Edlund, IBMMarch 16, 2001, April 16, 2001, April 18, 2001, May 4, 2001,August 10, 20014.0
69.1Golden Waveforms
Greg Edlund, IBMDecember 15, 2000, February 22, 2001Rejected March 30, 2001NA
68.1Clarify that Rising and Falling Waveforms Should be Correlated
David Lorang, IntelOctober 24, 2000, February 2, 2001February 16, 20014.0
67.1Increase V-T Table 100 Point Limit
Bob Ross, Mentor Graphics, Ian Dodd, CadenceOctober 24, 2000, October 27, 2000December 8, 20004.0
66[Model Spec] Vref Addition
Scott McMorrow, SiQualNovember 15, 1999December 8, 20004.0
65.2C_comp Refinements
Arpad Muranyi, Intel10-25-99, 12-12-2000, 2-2-2001February 16, 20014.0
64.4Alternate Package Models
Arpad Muranyi, Intel; Mike LaBonte, Cadence10-25-99, 11-19-99, 10-8-2000, 11-1-2000, 11-20-2000December 8, 20004.0
63.3Documentation of Receiver Setup and Hold Timing Conditions
D.C. Sessions (Philips), Stephen Peters, Richard Mellitz,Sept 8, 1999, Dec 27, 1999, Jan 6, 2000, Feb 17, 2000Rejected March 17, 2000NA
62.6Enhanced Specification of Receiver Thresholds
DC Sessions (Philips), Stephen Peters, Richard Mellitz,Aug 24 1999, Dec 28 1999, Jan 6 2000, Feb 18 2000,April 14, 20004.0
61.1Enhanced Characterization of Receivers
D.C Sessions (Philips), Richard Mellitz, Stephen Peters,August 9, 1999, Dec 28, 1999Rejected November 17, 2000NA
60Electrical Board Description Diagrams
Bob Ross, Mentor GraphicsAugust 4, 1999August 20, 19993.2
59.2Model Spec Diagrams
Bob Ross, Mentor GraphicsAugust 3, 1999, August 6, 1999, August 20, 1999August 20, 19993.2
58.3Driver Schedule Keyword Clarification
Arpad Muranyi, Intel Corporation3/2/99, 5/5/99, 5/10/99, 5/28/995/28/993.2
57.1Timed Bus Hold Extension
Bob Ross, Mentor G., Arpad Muranyi & Stephen Peters, Intel December 4, 1998, December 18, 1998December 18, 19983.2
56.1Relaxation of [Series Pin Mapping] Restriction
Bob Ross, Mentor GraphicsNovember 25, 1998, December 18, 1998December 18, 19983.2
55[Model Spec] Vmeas Addition
Bob Ross, Mentor GraphicsOctober 4, 1998November 20, 19983.2
54Package Model Corrections
Bob Ross, Mentor Graphics, Stephen Peters, Intel CorporationSeptember 28, 1998November 6, 19983.2
53.1IBIS File Character Set
Geoffrey Ellis at Cadence Design SystemsAugust 7, 1998, September 1, 1998September 18, 19983.2
52[Driver Schedule] Clarifications
Arpad Muranyi, Intel6/1/98July 17, 19983.1
513-state_ECL
Bob Ross, Mentor GraphicsMay 1, 1998June 5, 19983.2
50.3Add Submodel Bus Hold
Neven Orhanovic, Bob Ross, Mentor G., Arpad Muranyi, Intel4/2/98, 5/21/98, 5/29/98, 6/19/98July 17, 19983.2
49.4Add Submodel Dynamic Clamps
Neven Orhanovic, Bob Ross, Mentor G., Arpad Muranyi, Intel4/2/98, 5/1/98, 5/21/98, 6/19/98, 7/17/98July 17, 19983.2
48.4Add Submodel
Neven Orhanovic, Bob Ross, Mentor G., Arpad Muranyi, Intel4/2/98, 5/1/98, 5/21/98, 5/29/98, 6/19/98July 17, 19983.2
47Remove pin name as a sub-param of the [Pin List] keyword
Stephen Peters Intel Corp.March 5, 1998April 3, 19983.1
46.1Relaxation of some IBIS model file name restrictions.
Matthew Flora and Kellee Crisafulli, HyperLynx4 Dec 1997, 2 June 1998June 18, 19983.2
45.1Dynamic Clamps
Neven Orhanovic and Bob Ross, Interconnectix10/31/97, 11/20/97Rejected 4/24/98NA
44Interpretation of Min/Max/Weak/Strong data
Andy Ingraham, Digital Equipment Corp.June 8, 1997Rejected July 17, 1998 NA
43Component Test Point Subparameters
Bob Ross, InterconnectixMay 23, 1997June 12, 19973.0
42.3Modeling Current Waveforms
C. Kumar, Cadence, Bob Ross, InterconnectixMay 16, 1997, May 19, 1997, May 30, 1997, June 12, 1997Rejected July 17, 1998NA
41.8Modelling Series Switchable Devices
John Fitzpatrick, Alcatel, Bob Ross, Interconnectix2/12/97, 2/17/97, 5/14/97, 5/15/97, 5/16/97, 5/22/97,June 12, 19973.0
40Overshoot Nomenclature
Bob Ross, Interconnectix, Inc.November 27, 1996February 14, 19973.0
39Specification Enhancement
John Fitzpatrick, Alcatel CIT10/11/96November 8, 19963.0
38Maximum Voltage
John Fitzpatrick, AlcatelJuly 03, 1996Rejected Nov. 8, 1996 (coveredNA
37.3Enhancement To The Package Model (.pkg file) Specification
Stephen PetersJune 23, 1996, Aug. 12, 1996, Sept. 23, 1996, Oct. 18, 1996Oct 18, 19963.0
36.3Electric Descriptions of Boards
Stephen Peters, Intel, Hank Herrmann, AMPJune 23, 1996, Feb. 13, 1997, March 7, 1997, March 31, 1997April 8, 19973.0
35.3Multi-staged Outputs
Bob Ross, Interconnectix, Inc.5/13/96, 6/21/96, 10/16/9612/6/963.0
34.2Stored Charge Effects
Bob Ross, Interconnectix, Inc.3/5/96, 3/22/96, 9/27/96September 27, 19963.0
33Proposed IBIS Physical Package Format (.IAP)
Kellee Crissafulli, HyperlynxOctober 29, 1995Rejected June 6, 1996NA
32Additional Enhancement To The Package Model (.pkg file) Specification
C. KumarDec 14, 1995 (Actual Submission Jan. 11, 1996)Rejected May 30, 1997NA
31.3Mated Models
Bob Ross, Interconnectix, Inc.11/22/95, 3/18/96, 4/29/96, 5/4/96Rejected 5/30/97NA
30.2Programmable buffers in IBIS models
Arpad Muranyi8-10-95 10-03-95, 10-24-9510-27-953.0
29.2Banded_matrix Extension
Bob Ross, Interconnectix, Inc.26 May 1995, 5 June 199530 June 1995 (29.1), 21 July 1995 (29.2) 2.1
28.3Enhancement To The Package Model (.pak file) Specification
Stephen PetersMay 18, 1995June 26, 1995, August 21, 1995, Sept 20, 1995October 6, 19953.0
27.1Propose new keyword to specify default differential threshold
Bob Ward, Texas Instruments & Bob Ross, Inteconnectix, Inc.03APR9521SEPT95Rejected October 6, 1995NA
26General syntax rules an guidelines on TAB character usage
Arpad Muranyi, Intel Corporation, Folsom, CAMarch 20, 1995May 26, 19952.1
25.3Data Derivation Expansion
Bob Ross, Interconnectix, Inc.25 January 1995 7Feb95, 9Feb95, 24Feb9524Feb952.1
24.1C_comp, ramp rates and waveform tables
Stephen PetersDec, 6, 1994Passed 12/9/942.1
23Waveform Table Minimum Number of Numerical Entries
Bob Ross, Interconnectix, Inc.19 November 1994 December 9, 19942.1
22Sub-Parameter Case Sensitivity
Bob Ross, Interconnectix, Inc.29 October 1994 Rejected November 18, 1994NA
21Waveform Table Minimum Number of Entries
Bob Ross, Interconnectix, Inc.29 October 1994 November 18, 19942.1
20.1Error correction regarding monotonicity statement in V2.1
Kellee Crisafulli, HyperLynx Inc.10-10-9411-18-9411-18-942.1
19.1V_fixture Subparameter Min/Max Additions
Bob Ross, Interconnectix, Inc.8 August 1994 13 August 1994August 26, 19942.1
18.2[Diff Pin] Parameter Order
Bob Ross, Interconnectix, Inc. 20 July 199425 July 1984, 5 Aug 19945 August 19942.1
17Number of Points
Scott Bloom, Interconnectix, Inc. 17 July 1994Rejected August 26, 1994NA
16Adding an override section for [Model] sub-parameters
John Keifer at IntelMay 23, 1994May 18, 1994, May 20, 1994NA
15Clarification on the usage of the V/I tables.
Arpad Muranyi, Intel CorporationMay 10, 1994May 20, 1995 (with revisions in Standard)2.0
14.3Adding four new sub-parameters to [Model]
John Keifer at IntelMay 20, 19942.0
13.2Clarify Some Conditions of Measurements
Bob Ward Texas Instruments22 APR 94, 13 MAY 94May 20, 19942.0
12.2 Non-Linear Driver Waveforms
Stephen Peters, Intel Corp.April 25, 1994April 29, 1994 May 13, 19942.0
11.2Improving common error detection in IBIS_CHK program.
Kellee Crisafulli, HyperLynx Inc.03-28-9404-21-94April 29, 19942.0
10.2Describing coupling effects in package models
Eric Bracken, Performance Signal Integrity, Inc.17 March 199415 April 1994April 29, 19942.0
9.3Terminator Specification
Bob Ross, Interconnectix, Inc. 2 February 199421 February 1994, 22 April 1994, 29 April 199429 April 19942.0
8.2Specification of V/I data monotonicity
Kellee Crisafulli, HyperLynx Inc.January 29, 1994 5-9-94May 13, 19942.0
7.2Open Specification Completion
Bob Ross, Interconnectix, Inc. 13 January 199431 January 1994, 1 February 1994February 18, 19942.0
6.2Differential Pin Specification
Bob Ross, Interconnectix, Inc. 12 January 199429 January 1994, 5 February 1994February 18, 19942.0
5.2Pin Mapping for Ground Bounce Simulation
J. Eric Bracken, Performance Signal Integrity, Inc. and 6 December 1993, 17 December 1993 Jan 7, 1994
4ECL Extensions
Stephen Peters, Intel Corp.November 5, 1993November 12, 19932.0
3Multiple power supplies and references
Stephen Peters, Intel Corp.Nov 4, 1993November 12, 19932.0
2.2Requiring VIH VIL thresholds for input devices
Jon Powell, Quad DesginOctober 4, 1993February 16, 1994; April 26, 1994April 29, 1994NA
1 ECL Extensions
Stephen Peters, Intel Corp.September 22, 1993Rejected November 12, 1993NA

The incorporation of the BIRDs into versions of IBIS is also shown in birddir.txt.

The roadmap for incorporation of pending BIRDs into future versions of IBIS is shown in ibis-version-change-strategy-v2p4.pdf.

Previous minor versions of BIRDs are archived here.