| ID# | Issue Title | Requestor | Date Submitted | Date Accepted | Supported Version | Formats |
|---|---|---|---|---|---|---|
| 8 | Option line changes | Arpad Muranyi, Siemens EDA | March 20 2023 | Pending Vote | (DOC) | |
| 7 | Standardized Pole-Residue Representation of Touchstone Data | Arpad Muranyi, Siemens EDA | February 14, 2024 | Pending Vote | (DOC) | |
| 6 | Clarify File Extension Rule for Touchstone 1.0 and 1.1 Files | Bob Ross, Teraspeed Labs; Arpad Muranyi, Siemens EDA | July 5, 2023 | September 15, 2023 | 2.1 | (DOC) |
| 5.1 | Per Port Reference Resistance on the Option Line | Arpad Muranyi, Randy Wolff, Siemens EDA; Bob Ross, Teraspeed Labs | June 14, 2023; July 5, 2023 | September 15, 2023 | 2.1 | (DOC) |
| 4.1 | [End] Keyword Corrections and Other Editorial Changes | Michael Mirmak, Intel Corp. | March 2, 2022 , July 20, 2022 | September 9, 2022 | 2.1 | (DOC) |
| 3 | Clarify S-parameter Definition | Radek Biernacki, Agilent Technologies; Michael Mirmak, Intel | July 20, 2011 , | October 7, 2011 | 2.1 | (DOC) |
| 2.1 | Binary Format Support | Michael Mirmak, Intel Corp. for Interconnect Task Group | June 9, 2010 , July 14, 2010 | August 20, 2010 | (DOC) | |
| 1.1 | Sparse Matrix Mapping | Bob Ross, Teraspeed Consulting Group for Interconnect Task Group | February 26, 2010, April 23, 2010 | April 23, 2010 | (DOC) |
The incorporation of the TSIRDs into versions of Touchstone are shown in tsirddir.txt.